At ESC and IDF, Intel began discussing some details of the next two generations of processor cores for PCs and servers, referred to as Penryn and Nehalem.
Posted on April 29th, 2007 by In-Stat Processor Watch
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Two technical papers from the University of California at Berkeley and some recent experiences with software bugs make us wonder if the computer industry is truly ready for multicore processors.
Posted on April 29th, 2007 by In-Stat Processor Watch
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MIPS Technologies is introducing the MIPS32 1004K Coherent Processing System, the first licensable IP to support hardware multithreading and up to four-way symmetric multiprocessing on a chip.
Posted on April 27th, 2007 by In-Stat Processor Watch
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MPR Welcomes Technical and Business Contributions.
Posted on April 27th, 2007 by In-Stat Processor Watch
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Here’s a roundup of interesting microprocessor-related news from the spring Embedded Systems Conference in San Jose, California.
Posted on April 22nd, 2007 by In-Stat Processor Watch
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CISC and RISC Design Extremism Is a Vice
Posted on April 20th, 2007 by In-Stat Processor Watch
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Intel reveals 1TeraFLOP tile-based research processor that can be scaled beyond the boundaries of classic clock synchronization.
Posted on April 8th, 2007 by In-Stat Processor Watch
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New Low-Power Microarchitecture Rejuvenates the Embedded x86
Posted on April 6th, 2007 by In-Stat Processor Watch
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Freescale Semiconductor is entering the processor-IP licensing market with four versions of the Power e200 embedded-processor core.
Posted on April 1st, 2007 by In-Stat Processor Watch
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